cs.AR · 2026-07-01 · No. 40

Hardware Architecture, 2026-07-01.

2 new papers in cs.AR. Titles, authors, abstracts. Links to arXiv. Want this in your inbox every morning? Subscribe →

01 — The papers

2 entries
  1. 01

    FlexViT: A Flexible FPGA-based Accelerator for Edge Vision Transformers

    Hubert Dymarkowski, Xingjian Fu, Rappy Saha, Jude Haris, José Cano

    cs.AR · cs.CV · cs.DC · cs.LG

    Deploying Vision Transformer (ViT) models on edge platforms remains challenging due to their high computational demands and the architectural heterogeneity of modern hybrid ViT models, which incorporate both fully connected and convolutional layers. This heterogeneity leads to significant variation in tensor shapes, requiring flexible and efficient FPGA-based acceleration. In this paper, we present FlexViT, a reconfigurable FPGA accelerator...

    arxiv.org/abs/2606.31938 · PDF

  2. 02

    PEERS: A Parallel and Exact Effective Resistance Solver via Implicit Inversion and Augmented Symbolic Analysis

    Baiyu Chen, Lin Gan, Guangwen Yang, Wenjian Yu

    cs.AR · cs.DC · math.NA

    High-precision effective resistance computation is a cornerstone of Electronic Design Automation (EDA) sign-off, yet it remains a fundamental bottleneck in large-scale power grid analysis, spectral sparsification, and circuit reliability. Existing approaches face a prohibitive "precision-memory impasse": approximate methods lack the stringent accuracy required for high-stakes industrial sign-off, while exact methods either suffer from...

    arxiv.org/abs/2606.31535 · PDF

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