cs.AR · 2026-08-26 · No. 96

Hardware Architecture, 2026-08-26.

2 new papers in cs.AR. Titles, authors, abstracts. Links to arXiv. Want this in your inbox every morning? Subscribe →

01 — The papers

2 entries
  1. 01

    Maia 200: A Software Defined Dataflow System for Large-scale AI Acceleration

    Sherry Xu, Marco Heddes, Jackson Peng, Tom Savell, Monica Tang, Prashant Ranjan, Jesse Benson, Ofer Dekel, Saurabh...

    cs.AR · cs.AI · cs.DC · cs.ET · cs.LG

    We introduce Maia 200, an advanced AI accelerator delivering high performance-10 145 Tflop/s FP4 and 5072 Tflop/s FP8 within a 750W TDP and 7 TB/s HBM bandwidth. Maia exemplifies a new class of Software Defined Locally Accessed Dataflow Architectures (SDLA), which explicitly program dataflow engines to orchestrate highly specialized memories and data movement engines. This approach shifts the focus from today's thread-centric to...

    arxiv.org/abs/2608.24664 · PDF

  2. 02

    Simthesizer: An Agent-Driven Simulation Framework for LLM Serving Systems

    Wonung Kim, Hyunmin Choi, Minsu Kim, Jaehong Cho, Yeongwook Kim, Jongse Park

    cs.AR · cs.AI

    System-level simulation is an essential tool for exploring the rapidly expanding design space of LLM serving systems, where real deployments remain costly and often infeasible. However, modern LLM serving now evolves faster than human-driven simulator development can track, and emerging workloads and mechanisms, from agentic workflows to disaggregated serving, no longer fit the monolithic simulation pipeline that existing simulators assume....

    arxiv.org/abs/2608.24650 · PDF

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